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Topic Review (Newest First)
February 21st, 2018 09:51 AM
vikash
Re: ecil model papers for cse

As you want model question paper of CSE discipline for ECIL recruitment Exam, so here I am providing model question paper:

Electronics Corporation of India Limited (ECIL) CSE Model Question Paper

1.The current I in the given network.
a) 1A
b) 3A
c) 5A
d) 7A

2.For the Delta‐ Wye transformation in given figure, the value of the resistance R is.
a) 1/3 ohms
b) 2/3 ohms
c) 3/2 ohms
d) 3 ohms

3.In the given network, the Thevenin’s equivalent as seen by the load resistance Rl is
a) V=10 V, R= 2ohms
b) V=10V, R=3 ohms
c) V=15V, R= 2ohms
d) V=15V, R=3 ohms

4.The current I in a series R‐L circuit with R=10 ohms and L=20mH is given by i=2sin500t
A. If v is the voltage across the R‐L combination then i
a) lags v by 45 degree
b) is in‐phase with v
c) leads v by 45
d) lags v by 90

5.In thr given network, the mesh current I and the input impedance seen by the 50 V source,
respectively, are
a) 125/13 A and 11/8 ohms
b) 150/13 A and 13/8 ohms
c) 150/13 A and 11/8 ohms
d) 125/13 A and 13/8 ohms

6.A voltage sourcehaving a source impedance Z = R + jX can deliver maximum Average
power to a load impedance Z, when
a) Z = R + jX
b) Z = R
c) Z = jX
d) Z = R –jX

7.In the given circuit, the switch S is closed at t=0. Assuming that there is no initial Charge in
the capacitor, the current i(t) for t>0 is
a) V/R e^ (‐2t/RC)
b) V/R e^ (‐t/RC)
c) V/2R e^ (‐2t/RC)
d) V/2R e^ (‐t/RC)

8.For the circuit in given figure, if e(t) is a ramp signal, the steady state value of the Output
voltage v(t) is
a) 0
b) LC
c) R/L
d) RC

9.For the series RLC circuit in given figure, if w=1000 rad/sec, then the current I (in
Amperes) is
a) 2 ∟‐15
b) 2 ∟15
c) √2∟‐15
d) √2∟15

10.The Y‐parameter matrix (mA/V) of the two‐port given network is
a) [2 ‐1 ‐1 2]
b) [2 1 ‐1 2]
c) [1 ‐2 ‐1 2]
d) [2 1 1 2]

11.The maximum number of trees of the given graph is
a) 16
b) 25
c) 100
d) 125

12.Given figure shows a graph and one of its trees. Corresponding to the tree, the group of
branches that CAN NOT constitute a fundamental cut set is
a) 1,2,3
b) 1,4,6,8,3
c) 5,6,8,3
d) 4,6,7,3

13.The Y‐parameter matrix of a network is given by Y=[1 1 ‐1 1] A/V. The Z11 parameter of
the same network is
a) ½ ohms
b) 1/√2 ohms
c) 1 ohms
d) 2 ohms

14.For the given circuit, the switch was kept closed for a long time before opening it at t=0.
The voltage v(0+) is
a) ‐10 V
b) ‐1 V
c) 0V
d) 10 V

15.The input impedance of a series RLC circuit operating at frequency W=√2w, w being the
resonant frequency, is
a) R‐j(wL/√2) ohms
b) R+j(wL/√2) ohms
c) R‐j√2wL ohms
d) R‐j√2wL ohms
16.The threshold voltage V is negative for
a) an n‐channel enhancement MOSFET
b) an n‐channel depletion MOSFET
c) an p‐channel depletion MOSFET
d) an p‐channel JFET
17.At a given temperature, a semiconductor with intrinsic carrier concentration ni= 10 ^ 16 /
m^3 is doped with a donor dopant of concentration Nd = 10 ^ 26 /m^3. Temperature
remaining the same, the hole concentration in the doped semiconductor is
a) 10 ^ 26 /m^3
b) 10 ^ 16 /m^3
c) 10 ^ 14 /m^3
d) 10 ^ 6 /m^3}
18.At room temperature, the diffusion and drift constants for holes in a P‐type semiconductor
were measured to be Dp = 10 cm^2/s and µp = 1200 cm^2/V‐s, respectively. If the diffusion
constant of electrons in an N‐type semiconductor at the same temperature is Dn = 20 cm^2/s,
the drift constant for electrons in it is
a) µn = 2400 cm^2/V‐s
b) µn = 1200 cm^2/V‐s
c) µn = 1000 cm^2/V‐s
d) µn = 600 cm^2/V‐s
19.A common LED is made up of
a) intrinsic semiconductor
b) direct semiconductor
c) degenerate semiconductor
d) indirect semiconductor
20.When operating as a voltage regulator, the breakdown in a Zener diode occurs due to the
a) tunneling effect
b) avalanche breakdown
c) impact ionization
d) excess heating of the junction.
21.If the common base DC current gain of a BJT is 0.98, its common emitter DC current gain
is
a) 51
b) 49
c) 1
d) 0.0222.Negative resistance characteristics is exhibited by a
a) Zener diode
b) Schottky diode
c) photo diode
d) Tunnel diode
23.Let En and Ep, respectively, represent the effective Fermi levels for electrons and holes
during current conduction in a semiconductor. For lasing to occur in a P‐N junction of
band‐gap energy 1.2 eV, (En ‐ Ep) should be
a) greater than 1.2eV
b) less than 1.2eV
c) equal to 1.1eV
d) equal to 0.7eV
24.In a P‐well fabrication process, the substrate is
a) N‐type semiconductor and is used to build P‐channel MOSFET
b) P‐type semiconductor and is used to build P‐channel MOSFET
c) N‐type semiconductor and is used to build N‐channel MOSFET
d) P‐type semiconductor and is used to build N‐channel MOSFET
25.In a MOS capacitor with n‐type silicon substrate, the Fermi potential ¢ = ‐0.41 V and the
flat‐band voltage Vfb = 0V. The value of the threshold voltage Vt is
a) ‐0.82 V
b) ‐0.41 V
c) 0.41 V
d) 0.82
Refer given figure for question 26 and 27. Assume D1 and D2 to be ideal diodes.
26.Which one of the following statements is true?
a) Both D1 and D2 are ON.
b) Both D1 and D2 are OFF.
c) D1 is ON and D2 is OFF.
d) D2 is ON and D1 is OFF.
27.Values of Vo and I, respectively, are
a) 2V and 1.1 mA
b) 0V and 0 mA
c) ‐2V and 0.7 mA
d) 4V and 1.3 mA
28.In a BJT CASCODE pair, a
a) common emitter follows a common base
b) common base follows a common collector
c) common collector follows a common base
d) common base follows a common emitter
29.Inside a 741 op‐amp, the last functional block is a
a) differential amplifier
b) level shifter
c) class‐A power amplifier
d) class‐AB power amplifier
30.For the MOSFET in the given circuit, the threshold voltage Vt = 0.5V, the process
parameter KP = 150 µA/V^2 and W/L = 10. The values of Vd and Id, respectively, are
a) Vd = 4.5 V and Id = 1 mA
b) Vd = 4.5 V and Id = 0.5 mA
c) Vd = 4.8 V and Id = 0.4 mA
d) Vd = 6 V and Id = 0 mA
February 21st, 2018 09:49 AM
Unregistered
Re: ecil model papers for cse

I have completed B.Tech CSE Degree from Mumbai in last year. Now I am preparing for Govt. Examinations. I want to apply for job in Electronics Corporation of India Limited (ECIL). So I need model question papers of CSE discipline for ECIL recruitment exam?
November 29th, 2015 01:36 PM
nilesh
ECIL Model Papers for CSE

Discuss about ecil model papers for cse here. Welcome to Courses.ind.in and this page is for ecil model papers for cse discussion. If you are looking for information on ecil model papers for cse then ask your question is as much details as possible in the “Reply” box provided below. The more detailed your question will be, the more easy will it be for our experts to answers your query. And if you have any updated or latest information on ecil model papers for cse, then please share you knowledge with our experts in the “Reply” box below. Your reply will be published here and your knowledge can help many people. Thanks for stopping by at Courses.ind.in. Please visit again.

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